1. Field of the Invention
The present invention relates to a frame synchronous circuit, specifically to a frame synchronous circuit incorporated in a decoder that decodes audio signals as transmission data transmitted from a digital communication or a digital broadcasting station in the digital television.
2. Description of the Related Art
In recent years, the digital television and the digital broadcasting employing the digital communication system have been widespread. The digital television and the digital broadcasting transmit the audio signals in which image data and the like are digitized (or, coded). The receiver to receive the audio signals needs to decode the audio signals, and it possesses a decoder.
The audio signal includes a transmission data by each frame, and the transmitter transmits a plurality of the transmission data by each frame in a form of continuous bit strings. Such continuous bit strings of the transmission data by each frame is called as a bit stream. Normally, a transmission data by each frame includes a synchronizing information and an information to indicate the frame length of the transmission data, in addition to a coded data to be decoded. The synchronizing information is an information to indicate the start of the transmission data by each frame, which is basically allocated at the leading part of the transmission data and contained in each of the transmission data as the information of the same contents (for example, xe2x80x9c0 x f f f xe2x80x9d in MPEG). The information to indicate the frame length is one information contained in an information group generally called as the header, which indicates the frame length of the transmission data by each frame. The header having the information to indicate the frame length is allocated next to the synchronizing information. In order to extract each of the transmission data from a bit stream, the decoder to decode the audio signal possesses a frame synchronous circuit.
The frame synchronous circuit detects an information equivalent to a synchronizing information of the transmission data from the bit stream. When the information equivalent to the synchronizing information is detected, a frame length of the transmission data having the information equivalent to the detected synchronizing information is calculated and determined, on the basis of the information to indicate the frame length contained in the header to be allocated after the synchronizing information. The determination of the frame length confirms, also with respect to the transmission data transmitted in the form of a bit stream, that the subsequent transmission data starts at a bit part received in delay for the frame length of the transmission data from which the synchronizing information is detected.
In other words, if a normal synchronizing information is correctly detected, a subsequent synchronizing information of the transmission data is to be present at the bit part received in delay for the determined frame length of the transmission data from which the synchronizing information is detected. Accordingly in the subsequent operations, the synchronizing information of continuous transmission data can be detected securely, on the basis of the frame length of each of the transmission data. Provided that the detection of the synchronizing information is executed for one time or several times, and the synchronizing information is judged to be securely obtained (when the synchronizing information is obtained continuously for the several times in case of executing several times), the synchronization is considered to have been set up from such operations.
When the synchronization has been set up in a frame synchronous circuit, the frame synchronous circuit outputs a synchronizing signal to indicate that the synchronization has been set up to the circuits on the subsequent stage, and transmits a bit stream to the circuit on the subsequent stage. The circuits on the subsequent stage are able to securely execute desired processings (for example, decoding of the data) to the transmission data inputted in a bit stream on the basis of the synchronizing signal.
However, the transmission data can contain an information having the same content as the synchronizing information, at a disposition different from that of the synchronizing information. Such an information as should not be used in itself as the synchronizing information is called a pseudo synchronizing information. And, in case of transmitting image data and character data as the transmission data, it can happen that a plurality of transmission data of the same contents or similar contents are transmitted continuously. The transmission data having the same contents include a kind of a test signal of a sine wave.
In the frame synchronous circuit, the detection of the synchronizing information is executed to the transmission data transmitted in a bit stream, from the bit part having been transmitted to the frame synchronous circuit; that is, the detection of the synchronizing information is not necessarily executed from the leading part of the transmission data. Accordingly, as to the transmission data including a pseudo synchronizing information, the frame synchronous circuit can happen to detect this pseudo synchronizing information as a normal synchronizing information. The synchronization as above cannot be set up as to such a pseudo synchronizing information, namely, the so-called synchronization loss is created.
In other words, in the frame synchronous circuit, when the detection of a synchronizing information is executed from a transmission data for one time, if a pseudo synchronizing information is detected by chance, it will lead to transmitting a synchronizing signal at a wrong timing on the basis of this pseudo synchronizing information. Accordingly, the subsequent processing to the transmission data, for example, the decoding of the transmission data cannot appropriately be executed.
And as mentioned above, in the frame synchronous circuit, when the detection of a synchronizing information is executed for plural times from a plurality of transmission data, if a pseudo synchronizing information is detected, an information allocated next to the pseudo synchronizing information is forcibly used as the header. Accordingly, this will lead to determining the frame length on the basis of the information not being the header. As a result, it can happen that the determined frame length becomes shorter or longer than the proper frame length for the transmission data. The frame length determined when a pseudo synchronizing information is detected frequently becomes shorter than the proper frame length.
Thus, since the detection of the synchronizing information relating to the subsequent transmission data is executed on the basis of a wrong frame length, the detection of the synchronizing information relating to the subsequent transmission data is delayed, and the setup of synchronization takes a longer time.
And as mentioned above, when a plurality of similar transmission data such as image data, character data, or the like are transmitted continuously as a transmission data, the frame length determined is different from the proper frame length; for example, it is shorter than the proper frame length, which, after the detection of a pseudo synchronizing information, will lead to continuously producing a plurality of information different from the synchronizing information. Accordingly, it will not only take more time to obtain the proper synchronizing information, the operation will also fall into such a state that only such a pseudo synchronizing information can be obtained. In this case, the frame synchronous circuit cannot get out of the state to detect the pseudo synchronizing information. In consequence, the synchronization will not be set up indefinitely, the transmission data will not be transmitted to the subsequent devices, and the processing will not be performed by the subsequent devices (for example, the decoding of the transmission data). Once the frame synchronous circuit falls into such a state, it becomes impossible to deliver the output signal as the whole device containing the decoder.
Further, accompanying with the trend of downsizing the electronics and the widespread of portable equipment in recent years, it becomes necessary to make the decoder smaller, and to avoid a significant increase in the frame synchronous circuit construction as well.
The present invention has been made in view of the foregoing problems, and it is an object of the invention to provide a frame synchronous circuit that sets up the synchronization securely in a high-speed, even though a transmission data including a pseudo synchronizing information is transmitted.
Further, the invention intends to provide a frame synchronous circuit that suppresses increase of the components to the utmost and achieves the foregoing object.
In order to accomplish the foregoing objects, a frame synchronous circuit disclosed in this invention receives transmission data continuously which include at least synchronizing information and information indicating frame lengths, detects the synchronizing information of the transmission data, and sets up a synchronization to the transmission data. The frame synchronous circuit is made up with the following components: an input control unit that sequentially receives the transmission data, and on the basis of the frame length information of a preceding transmission data controls to send out a subsequent transmission data; a synchronizing information comparison unit that detects an information equivalent to the synchronizing information from the transmission data sent from the input control unit, compares the information detected as the synchronizing information with a predetermined information, and outputs an indication information that indicates a coincidence or non-coincidence of the comparison; a frame length determination unit that determines a frame length on the basis of the information indicating the frame lengths contained in the transmission data, and outputs the frame length as a frame length information; and a counter that counts a detected number of times of the coincidence and a detected number of times of the non-coincidence in accordance with the indication information, and outputs a control signal when the detected number of times of the non-coincidence reaches a predetermined number of times.
And, in the foregoing construction, the input control unit varies the frame length information inputted from the frame length determination unit in accordance with the control signal, and controls to send out the transmission data on the basis of the frame length information varied.